PWM controller saves power at every turn

PWM controller saves power at every turn
"Energy efficiency is more important today than ever, with legislation or advisory standards on standby power developing worldwide. National's integrated LM5021 PWM controller offers designers of AC/DC power converters the right combination of performance, space savings, comprehensive protection and lower heat dissipation to reliably meet the new energy standards," said Paul Greenland, director of product marketing for the company's Power Management group. "The LM5021 also complements National's LM5000 family of high-voltage isolated DC/DC PWM controllers and drivers, enabling our customers to design complete power systems from the AC line cord to the point of load."
The controller integrates a high-frequency current-mode design (for improved transient response and simplified loop compensation) with internal slope compensation (LM5021-1 only, to protect against subharmonic oscillation at duty cycles greater than 50 percent), as well as user-programmable soft-start and a 0.7 amp MOSFET driver. It includes skip-, burst-, and low-power bias circuitry to ensure improved efficiency over a wide load range. The cycle-skipping burst mode reduces losses during standby (with the chip easily meeting the so-called 1-watt standby initiative), and during light-load operation. The chip's built-in soft-start timer allows the designer to minimize start-up surge currents that can stress components or saturate the power transformer. Operating current is 25 microamps in the start-up mode.

Additional features include the chip's under-voltage lockout circuitry, which has wide hysteresis, allowing designers to select a smaller bias supply filter capacitor for cost and real-estate savings. The LM5021 also includes cycle-by-cycle current limiting and a (programmable) hiccup-mode for protection against overload/short-circuits and sustained operation above the power limit. The switching frequency is programmed by a single resistor and the chip can be synchronized to an external clock to reduce interference. Internal leading-edge blanking of the current sense signal reduces external filtering.

Release Date:2018-10-26 14:19
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